The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2007
Filed:
Jan. 31, 2005
Shanjen Pan, Plano, TX (US);
Sameer Pendharkar, Allen, TX (US);
James R. Todd, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor device () that includes a drain extended PMOS transistor (CT) is provided, as well as fabrication methods () therefore. In forming the PMOS transistor, a drain () of the transistor is formed over a region () of a p-type upper epitaxial layer (), where the region () of the p-type upper epitaxial layer () is sandwiched between a left P-WELL region () and a right P-WELL region () formed within the p-type upper epitaxial layer (). The p-type upper epitaxial layer () is formed over a semiconductor body () that has an n-buried layer () formed therein. This arrangement serves to increase the breakdown voltage (BVdss) of the drain extended PMOS transistor.