The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2007

Filed:

Jun. 07, 2005
Applicants:

Young Sir Chung, Chandler, AZ (US);

Robert W. Baird, Gilbert, AZ (US);

Mark A. Durlam, Chandler, AZ (US);

Bradley N. Engel, Chandler, AZ (US);

Inventors:

Young Sir Chung, Chandler, AZ (US);

Robert W. Baird, Gilbert, AZ (US);

Mark A. Durlam, Chandler, AZ (US);

Bradley N. Engel, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit device includes a magnetic random access memory ('MRAM') architecture and at least one inductance element formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is formed at the same metal layer (or layers) as the program lines of the MRAM architecture. Any available metal layer in addition to the program line layers can be added to the inductance element to enhance its efficiency. The concurrent fabrication of the MRAM architecture and the inductance element facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.


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