The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2007
Filed:
Sep. 21, 2004
Michael Burstein, Cupertino, CA (US);
Vladimir Zakladny, San Jose, CA (US);
Alexander Kouznetsov, Campbell, CA (US);
Michael Burstein, Cupertino, CA (US);
Vladimir Zakladny, San Jose, CA (US);
Alexander Kouznetsov, Campbell, CA (US);
Golden Gate Technology, Inc., San Jose, CA (US);
Abstract
A method, algorithm, software, architecture and/or system for routing signal paths or connections between circuit blocks in a circuit design is disclosed. In one embodiment, a method of routing can include: (i) determining a switching activity for signal path between a first circuit block and a second circuit block; and (ii) routing the signal path substantially in a connectivity layer related to the switching activity of the signal path. The circuit blocks can include standard cells configured to implement a logic or timing function, other components, and/or integrated circuits, for example. The switching activity can include a switching frequency determination based on simulation results of the signal path between the circuit blocks. Embodiments of the present invention can advantageously reduce power consumption as well as supply noise by optimally routing signal paths between circuit blocks in an automated place-and-route flow. Further, signal integrity problems due to non-optimal routing can be reduced or minimized relative to conventional techniques.