The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2007
Filed:
Jun. 16, 2004
Kamran Zarrineh, Billerica, MA (US);
Kenneth A. House, Arlington, MA (US);
Syed A. Obaidulla, Sunnyvale, CA (US);
Kamran Zarrineh, Billerica, MA (US);
Kenneth A. House, Arlington, MA (US);
Syed A. Obaidulla, Sunnyvale, CA (US);
Sun Microsystems, Inc., Santa Clara, CA (US);
Abstract
A memory BIST architecture provides an efficient communication interface between external agents, e.g., external tester and a memory BIST module. The memory BIST architecture reduces diagnostics efforts by dividing the search space and allowing the test and debug to be concentrated on the failing memory. The memory BIST architecture is divided into two levels, a memory BIST sequencer level and a satellite memory BIST module. The memory BIST sequencer level includes a set of registers that provide an interface between external agents attempting to communicate with the MBIST module and the Satellite MBIST module.