The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2007

Filed:

Nov. 17, 2003
Applicants:

Koji Murata, Kusatsu, JP;

Takashi Iwamoto, Kusatsu, JP;

Hiroki Horiguchi, Ritto, JP;

Ryuichi Kubo, Otsu, JP;

Hidetoshi Fujii, Shiga-ken, JP;

Naoko Aizawa, Shiga-ken, JP;

Inventors:

Koji Murata, Kusatsu, JP;

Takashi Iwamoto, Kusatsu, JP;

Hiroki Horiguchi, Ritto, JP;

Ryuichi Kubo, Otsu, JP;

Hidetoshi Fujii, Shiga-ken, JP;

Naoko Aizawa, Shiga-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing an electronic device includes the steps of forming a first resist pattern on a primary surface of a SAW element, the first resist pattern having openings at positions corresponding to those at which bumps and a sealing frame are to be formed, sequentially forming metals over the first resist pattern, the metals being formed into adhesion layers, barrier metal layers, and solder layers, removing the first resist pattern on the SAW element such that the bumps and the sealing frame are simultaneously formed. When the bumps and the sealing frame of the SAW element are bonded to bond electrodes of the bond substrate, the solder layers are melted and alloyed by heating.


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