The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2007

Filed:

Sep. 24, 2002
Applicants:

Toshinori Ushio, Osaka, JP;

Keiichi Yoshisaka, Osaka, JP;

Mitsuhiko Yamamoto, Osaka, JP;

Masaaki Yokoi, Osaka, JP;

Inventors:

Toshinori Ushio, Osaka, JP;

Keiichi Yoshisaka, Osaka, JP;

Mitsuhiko Yamamoto, Osaka, JP;

Masaaki Yokoi, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05D 23/32 (2006.01); H04M 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An object of the present invention is to provide a technique capable of assembling a device in both of a first device performing a first function with a predetermined part and a second device performing a second function without a second part, and instructing each of the first and second functions. Determining means () determines the presence or absence of an electronic expansion valve () and gives the result to a central processing unit (). The central processing unit () allows a gate array () operate and instruct a first function including a function of performing communication between a communication network () and an indoor unit (). When there is no electronic expansion valve (EV), the determining means () sends a result of the determination result indicative of the absence to the central processing unit (). The central processing unit () instructs a second function of making the gate array () inoperative.


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