The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2007
Filed:
May. 20, 2002
Takeshi Nakayama, Katano, JP;
Hiroshi Ikeda, Kyoto, JP;
Shinichi Tanimoto, Katano, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
In a design aiding apparatus of the present invention, a plane clearance setting unit acquires information showing a predetermined margin, a component placement unit determines a placement area of a component such that, as seen in a lamination direction of a multilayer wiring board, at least one of the component and a pad connected to the component is included within a candidate area of a plane foil excluding a perimeter area, and a wiring unit determines a placement area of a wiring foil and a via in the same way that the placement area of the component is determined. Furthermore, in regard to a component, a component pad, a wiring foil, and a via whose placement areas have already been determined, a component placement inspection unit reports a design condition violation if the placement area of at least one of the component and the pad deviates outside the candidate area as seen in the lamination direction of the board, and a wiring inspection unit reports a design condition violation if the placement area of the wiring foil or the via deviates outside the candidate area as seen in the lamination direction of the board.