The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2007
Filed:
Nov. 08, 2004
Allen P. Haar, State College, PA (US);
Joseph A. Iadanza, Hinesburg, VT (US);
Sebastian T. Ventrone, South Burlington, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
Allen P. Haar, State College, PA (US);
Joseph A. Iadanza, Hinesburg, VT (US);
Sebastian T. Ventrone, South Burlington, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method for converting globally clock-gated circuits to locally clock-gated circuits is disclosed. A timing analysis is initially performed on an integrated circuit (IC) design to generate a slack time report for all globally clock-gated circuits within the IC design. Based on their respective slack time indicated in the slack time report, all globally clock-gated circuits that should be connected to locally generated clocks are identified. After disconnecting from a global clock tree, each of the identified globally clock-gated circuits is subsequently connected to a locally generated clock having a clock delay comparable to its slack time indicated in the slack time report.