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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7256079 B1

PDFFull Text
Expired
Date of Patent:
Aug. 14, 2007

Filed:

Dec. 16, 2003

Evaluation method using a teg, a method of manufacturing a semiconductor device having a teg, an element substrate and a panel having the teg, a program for controlling dosage and a computer-readable recording medium recoding the program

Applicants:

Etsuko Asano, Kanagawa, JP;

Osamu Nakamura, Kanagawa, JP;

Masayuki Sakakura, Kanagawa, JP;

Inventors:

Etsuko Asano, Kanagawa, JP;

Osamu Nakamura, Kanagawa, JP;

Masayuki Sakakura, Kanagawa, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;

Attorneys:

Nixon Peabody LLP

Jeffrey L. Costellia

Primary Examiner:

Zandra V Smith

Assistant Examiner:

Pamela E Perkins

Int. Cl.
CPC ...
H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

The reliability of a GOLD structure TFT depends on an impurity concentration in its gate-overlapped region. Thus, it is an object of the present invention to obtain a resistance distribution corresponding to a tapered shape of a gate electrode in a gate-overlapped region. According to the present invention, plural TEGs are manufactured as Lov resistance monitors in which mask alignment is misaligned with several μm interval to perform a resistance measurement on each of the TEGs. Consequently, a resistance distribution corresponding to a tapered shape can be obtained in a channel forming region, a gate-overlapped region and a source/drain region.

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Asano, Etsuko. (2007). Evaluation method using a teg, a method of manufacturing a semiconductor device having a teg, an element substrate and a panel having the teg, a program for controlling dosage and a computer-readable recording medium recoding the program (U.S. Patent No. 7256079). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7256079

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