The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2007
Filed:
Mar. 19, 2003
Giorgio Giaretta, Mountain View, CA (US);
The' Linh Nguyen, San Jose, CA (US);
Jan Lipson, Cupertino, CA (US);
Rudolf J. Hofmeister, Sunnyvale, CA (US);
Giorgio Giaretta, Mountain View, CA (US);
The' Linh Nguyen, San Jose, CA (US);
Jan Lipson, Cupertino, CA (US);
Rudolf J. Hofmeister, Sunnyvale, CA (US);
Finisar Corporation, Sunnyvale, CA (US);
Abstract
The present invention relates generally to optoelectronic devices, and particularly to a submount, pedestal, and bond wire assembly for a transistor outline package. A bottom surface of the submount is connected to a top surface of the pedestal. Each bond wire in a bond wire set is connected to a position on the top surface of the submount, and to a position on the signal line. The signal line is positioned a first distance from the position on the top surface of the submount and a second distance from the pedestal. The submount is sized such that a portion of the bottom and the top surface of the submount extends beyond the top surface of the pedestal such that the first distance is less than the second distance.