The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2007

Filed:

Mar. 24, 2005
Applicants:

Ngai Ming Lau, Fountain Hills, AZ (US);

Jeffrey D. Gengler, Maricopa, AZ (US);

Inventors:

Ngai Ming Lau, Fountain Hills, AZ (US);

Jeffrey D. Gengler, Maricopa, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H02H 9/08 (2006.01); H02H 3/22 (2006.01); H02H 3/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit for protecting an electronic device including a differential nulling avalanche clamp circuit () and method of using the circuit in an electronic system () to limit radio frequency overdrive. The electronic system () includes a surge clamp () coupled to dissipate an electrical surge effect of a first frequency from a noise sensitive node () and a ring wave clamp () coupled to dissipate an electrical surge effect of a second frequency from the noise sensitive node (). The ring wave clamp circuit () includes a first bipolar junction transistor (), a second bipolar junction transistor () coupled to the first bipolar junction transistor (), and a resistive circuit () coupled to the first and second bipolar junction transistors (). A method of using the electronic system () in a device to limit radio frequency overdrive includes the steps of driving an output node with the radio frequency signal subject to overdrive effects (), clamping a first order overdrive effect on a first node using a first clamp circuit (), and clamping a second order overdrive effect on the first node using the differential nulling avalanche clamp circuit ().


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