The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2007

Filed:

May. 31, 2005
Applicants:

Rajarshi Mukhopadhy, Atlanta, GA (US);

Sebastien Nuttinck, Atlanta, GA (US);

Sang-hyun Woo, Seoul, KR;

Jong-han Kim, Suwon-si, KR;

Seong-soo Lee, Suwon-si, KR;

Chang-ho Lee, Marietta, GA (US);

Joy Laskar, Marietta, GA (US);

Inventors:

Rajarshi Mukhopadhy, Atlanta, GA (US);

Sebastien Nuttinck, Atlanta, GA (US);

Sang-Hyun Woo, Seoul, KR;

Jong-Han Kim, Suwon-si, KR;

Seong-Soo Lee, Suwon-si, KR;

Chang-Ho Lee, Marietta, GA (US);

Joy Laskar, Marietta, GA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03H 11/00 (2006.01); H03H 11/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An active inductor capable of tuning a self-resonant frequency, an inductance, a Q factor, and a peak Q frequency by applying a tunable feedback resistor to a cascode-grounded active inductor is disclosed. The tunable active inductor includes a first transistor having a source connected to a power supply voltage and a gate connected to first bias voltage; a second transistor having a drain connected to a drain of the first transistor and a gate connected to a second bias voltage; a third transistor having a drain connected to a source of the second transistor and a source connected to a ground voltage; a fourth transistor having a drain connected to a gate of the third transistor, a source connected to the ground voltage and a gate connected to a third bias voltage; a fifth transistor having a source connected to the drain of the fourth transistor and a drain connected to the power supply voltage.


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