The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7251742 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 31, 2007

Filed:

Jun. 12, 2004
Applicants:

Mark P. Barrieau, Baldwinville, MA (US);

Richard P. Bonneau, Templeton, MA (US);

Gregg A. Lupaczyk, Shirley, MA (US);

Inventors:

Mark P. Barrieau, Baldwinville, MA (US);

Richard P. Bonneau, Templeton, MA (US);

Gregg A. Lupaczyk, Shirley, MA (US);

Assignee:

SimplexGrinnell LP, Westminster, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Mis-wired addressable loops are determined by enabling all loops and identifying all devices communicating on all loops. A list of all identified devices is recorded. One at a time, each loop is disconnected, a list of devices that are disabled is determined and recorded for the disconnected loop, and the loop is reconnected. When all of the loops have been processed, the lists of disabled devices are compared and those devices that are wired improperly are determined.


Find Patent Forward Citations

Barrieau, Mark. (2007). Method and apparatus for determining mis-wired addressable loops (U.S. Patent No. 7251742). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7251742

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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