The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2007

Filed:

Mar. 28, 2003
Applicants:

Hiroyuki Fukuyama, Yamanachi, JP;

Takeru Yonaga, Tokyo, JP;

Hitoshi Tanaka, Kanagawa, JP;

Inventors:

Hiroyuki Fukuyama, Yamanachi, JP;

Takeru Yonaga, Tokyo, JP;

Hitoshi Tanaka, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor test circuit including an input terminal, a controller, a setting circuit, a command generator, a transmission path switching circuit and a comparator. The input terminal receives serial data including a command code and control data. The controller receives a control signal from the input terminal and outputs an internal control signal. The setting circuit receives serial data from the input terminal and outputs it to the command generator in response to the internal control signal. The command generator then generates an interface signal based on this serial data. The switching circuit receives the signal from one of its ports and outputs the received signal to another port in response to the internal control signal and the command code, and the comparator compares the interface signal received from the command generator with the signal received from the switching circuit.


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