The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2007
Filed:
Feb. 04, 2005
William R. Griesbach, Pocono Pines, PA (US);
Che Choi C. Leung, Bethlehem Township, Northampton County, PA (US);
William R. Griesbach, Pocono Pines, PA (US);
Che Choi C. Leung, Bethlehem Township, Northampton County, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
An ESD power clamp utilizes both a transient triggering method integrated together with a voltage level detection circuit to disable a MOSFET transistor forming the ESD power clamp unless the voltage level on a relevant power supply rail is higher than a predetermined level above the normal power supply voltage. When the voltage level of the power supply rail is higher than the predetermined level (e.g., 10% higher, 25% higher, etc.), then the power surge is presumed to be an ESD pulse, and thus the ESD power clamp is enabled to turn ON and discharge the ESD power surge.