The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2007
Filed:
Oct. 31, 2005
Kelley Kyle Higgins, Sr., Austin, TX (US);
Joseph William Wiseman, Austin, TX (US);
Kelley Kyle Higgins, Sr., Austin, TX (US);
Joseph William Wiseman, Austin, TX (US);
Spansion LLC, Sunnyvale, CA (US);
Abstract
A method for manufacturing a semiconductor component using a sacrificial masking structure. A semiconductor device is formed from a semiconductor substrate and a layer of dielectric material is formed over the semiconductor substrate and the semiconductor device. The layer of dielectric material may be formed directly on the semiconductor substrate or spaced apart from the semiconductor substrate by an interlayer. Posts or protrusions having sidewalls are formed from the layer of dielectric material. An electrically insulating material that is preferably different from the layer of dielectric material is formed adjacent the sidewalls of the posts. The electrically insulating material is planarized and the posts are removed to form openings that may expose a portion of the semiconductor device or a portion of the interlayer material. An electrically conductive material is formed in the openings.