The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
Dec. 18, 2003
Ki-hyun Kim, Seongnam-si, KR;
Sung-hyu Han, Seoul, KR;
In-sik Park, Suwon-si, KR;
Jae-seong Shim, Seoul, KR;
Yoon-woo Lee, Suwon-si, KR;
Ki-hyun Kim, Seongnam-si, KR;
Sung-hyu Han, Seoul, KR;
In-sik Park, Suwon-si, KR;
Jae-seong Shim, Seoul, KR;
Yoon-woo Lee, Suwon-si, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
A method of generating error correction parity information using a parity check matrix having m rows and n columns, wherein m is a number of parity bits and n is a number of codeword bits, wherein a same fixed number of elements in each of the rows has a value of 1 and all remaining elements in each of the rows has a value of 0, and wherein a same fixed number of elements in each of the columns has a value of 1 and all remaining elements in each of the columns has a value of 0, the error correction method including generating a lower triangular matrix in 1st through k-th rows and (n−m+1)-th through (n−m+k)-th columns of the parity check matrix by performing row and column permutations on the parity check matrix, wherein k<m; and obtaining m parity bits using the parity check matrix including the lower triangular matrix and (n−m) message bits.