The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2007

Filed:

Jun. 14, 2005
Applicants:

Yeshwant N. Kolla, Raleigh, NC (US);

Gregory Christopher Burda, Raleigh, NC (US);

Jeffrey Herbert Fischer, Cary, NC (US);

Inventors:

Yeshwant N. Kolla, Raleigh, NC (US);

Gregory Christopher Burda, Raleigh, NC (US);

Jeffrey Herbert Fischer, Cary, NC (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques for reducing power when reading a full-swing memory array are disclosed. The full-swing memory array includes a plurality of local bit lines and a global bit line. In order to reduce power consumption, a method of driving the global bit line includes the step of coupling the plurality of local bit lines to the global bit line through a plurality of tri-state devices. The method further includes the steps of generating a global select signal to enable one of the plurality of tri-state devices and selecting a corresponding local bit line to drive the output of the enabled tri-state device. In this way, the global bit line is statically driven so that consecutive reads of bits having the same value read over the global bit line do not result in transitioning the state of the global bit line.


Find Patent Forward Citations

Loading…