The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 10, 2007

Filed:

May. 03, 2002
Applicants:

Gregory W. Starr, San Jose, CA (US);

Richard Yen-hsiang Chang, San Jose, CA (US);

Edward P. Aung, San Leandro, CA (US);

Inventors:

Gregory W. Starr, San Jose, CA (US);

Richard Yen-Hsiang Chang, San Jose, CA (US);

Edward P. Aung, San Leandro, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A PLL circuit is described. The PLL circuit includes: a signal generator and at least one divider coupled to the signal generator, where the at least one divider is programmable in user mode. In one embodiment, the PLL circuit includes a memory device associated with the at least one divider, where the memory device receives settings data and provides settings data to the at least one divider in user mode.


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