The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7242222 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 10, 2007

Filed:

Jun. 15, 2005
Applicant:

Tadahiro Omata, Yamanashi, JP;

Inventor:

Tadahiro Omata, Yamanashi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output circuit has an output transistor, or a complementary pair of output transistors, that generate a bi-level voltage signal with a high output level and a low output level. The signals applied to the gates of the output transistors have high and low levels that are more narrowly separated than are the output high and low levels. For example, one gate signal may swing between the output high level and an intermediate level, and another gate signal may swing between the output low level and the same or a different intermediate level. The relatively narrow voltage swing reduces current consumption, and the intermediate level or levels can be adjusted to adjust the rise time and fall time of the output signal.


Find Patent Forward Citations

Omata, Tadahiro. (2007). Output circuit with reduced gate voltage swings (U.S. Patent No. 7242222). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7242222

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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