The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
Dec. 02, 2004
Rafael Camarota, Sunnyvale, CA (US);
Irfan Rahim, San Jose, CA (US);
Boon Jin Ang, Penang, MY;
Thow Pang Chong, Johor, MY;
Rafael Camarota, Sunnyvale, CA (US);
Irfan Rahim, San Jose, CA (US);
Boon Jin Ang, Penang, MY;
Thow Pang Chong, Johor, MY;
Altera Corporation, San Jose, CA (US);
Abstract
Techniques for combining volatile and non-volatile programmable logic into one integrated circuit (IC) are provided. An IC is segregated into two portions. A first block of programmable logic is configured by bits stored in on-chip non-volatile memory. A second block of programmable logic is configured by bits stored in off-chip memory. The function of IO banks on the IC is multiplexed between the two logic blocks of the IC. The programmable logic in the first block can be configured and fully functional in a fraction of the time that the programmable logic in the second block can be configured. The programmable logic in the first block can configure fast enough and have enough independence to assist in the configuration of the second block. The non-volatile memory can also provide security features to a user design, such as encryption.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile