The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2007
Filed:
May. 18, 2004
Douglas E. Dolan, Hollis Center, ME (US);
Douglas E. Dolan, Hollis Center, ME (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
A packaged integrated circuit having a die with multiple transistors selected from the group consisting of multiple logic, linear and analog linear transistors is provided. The die is attached to a die pad with one or more peripheral leads physically isolated from the die pad, one or more leads integrally connected to the die pad, bond wires, and an encapsulant-formed package body. A lip formed by a vertically recessed lower surface is present on two opposing sides and one end of each physically isolated lead, but not on the surfaces of the integrally connected lead(s). Manufacturing the package includes: providing a leadframe having the die pad and leads connected to a frame; mounting the die to the die pad; electrically connecting, with bond wires, the die to the physically isolated lead(s), but not to the integrally connected lead(s); applying an encapsulant to the leadframe that underfills the lips to lock the physically isolated leads in place; and cutting the leads and die pad from the frame.