The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2007

Filed:

Feb. 18, 2005
Applicants:

Henry R. Farmer, Colchester, VT (US);

Gary D. Grise, Colchester, VT (US);

David W. Milton, Underhill, VT (US);

Mark R. Taylor, Essex Junction, VT (US);

Inventors:

Henry R. Farmer, Colchester, VT (US);

Gary D. Grise, Colchester, VT (US);

David W. Milton, Underhill, VT (US);

Mark R. Taylor, Essex Junction, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

When testing an ASIC using functional clocks, a control circuit at the clock root incorporates additional test logic in the root and a deskewer for clock control, giving rise to a very flexible control that can pass clock signals at a number of clock rates and can pass only a single clock edge, thereby permitting the passage of the required number of clock pulses for a test. The system uses the functional clock and the clock distribution tree designed into the ASIC.


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