The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2007
Filed:
Aug. 03, 2005
Seiichiro Jinta, Kanagawa, JP;
Ryuya Koike, Kanagawa, JP;
Seiichiro Jinta, Kanagawa, JP;
Ryuya Koike, Kanagawa, JP;
Sony Corporation, , JP;
Abstract
The present invention provides a level conversion circuit including first and second transistors, a clock terminal, first switch means, second switch means, and a capacitance element. The first and second transistors are of the opposite conduction types to each other connected in series between a first power supply potential and a second power supply potential. The clock terminal is inputted a clock signal. The first switch means is connected between the clock terminal and the gate of the first transistor and has an on state when a circuit operation control signal is in an active state. The second switch means is connected between the second power supply potential and the gate of the second transistor and has an off state when the circuit operation control signal is in an active state. The capacitance element is connected between the clock terminal and the gate of the second transistor.