The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2007

Filed:

Dec. 30, 2004
Applicant:

Ji Ho Hong, Suwon-si, KR;

Inventor:

Ji Ho Hong, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a semiconductor device to minimize a terminal effect in an ECP process is disclosed. The method for fabricating a semiconductor device to minimize a terminal effect in an ECP process, comprises depositing a barrier metallic layer on the top of a damascene pattern formed through an etching process, forming an Ag seed layer by employing a heating process for the reaction of the surface of the barrier metallic layer and a NHsolution of AgNOand reductive materials in a reactor, plating a Cu layer by using the Ag seed layer through an ECP process and forming a Cu interconnect through an annealing process and a Cu CMP process. The method for fabricating a semiconductor device according to the present invention provides the improvement of uniformity by forming a seed layer with low-resistivity regardless of a thin thickness in order to avoid a terminal effect in an ECP process.


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