Methods of fabricating integrated circuit devices having resistors with different resistivities therein

Abstract

Methods of forming integrated circuit devices include forming patterned layers having different resistivities on semiconductor substrates. These methods include forming a first electrically conductive layer having a first resistivity on first and second portions of a semiconductor substrate. The first portion of the semiconductor substrate may include a memory cell array portion of the substrate and the second portion of the semiconductor substrate may include a peripheral circuit portion of the substrate, which extends adjacent the memory cell array portion. The first electrically conductive layer is patterned to define an upper capacitor electrode on the first portion of the substrate and a resistive pattern on the second portion of the substrate. A second electrically conductive layer is then formed on a third portion of the substrate and on the resistive pattern. The second electrically conductive layer is patterned to define a first resistor pattern on the third portion of the substrate and a patterned resistor cap on the resistive pattern.