The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2007
Filed:
Jul. 02, 2002
Robert Henrikus Margaretha Van Veldhoven, Eindhoven, NL;
Gian Hoogzaad, Delft, NL;
Robert Henrikus Margaretha Van Veldhoven, Eindhoven, NL;
Gian Hoogzaad, Delft, NL;
NXP B.V., Eindhoven, NL;
Abstract
A pseudo random generator comprising a shift register comprising a first flip flop (F) and n further flip-flops (F. . . Fn) each flip-flop (F) having a D input, a non-inverting output, an inverting output, and a common clock (fclk) input and the first flip-flop (F) having a set input, each of the non-inverting outputs being connected via a NOR gate () to the set input of the first flip-flop (F) and each of the non-inverting outputs of the flip-flops (F. . . Fn) being connected to the input of the first flip-flop (F) via an XOR gate (), characterised in that the generator comprises at least one additional logic gate () including at least one additional flip-flop (). The extra logic gates may comprise gated to toggle between the inverting end and the non-inverting outputs, or to generate an extra '0' at the output or to chop, preferably randomly, the input signal.