The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2007
Filed:
Nov. 22, 2005
Peter R. Holloway, Groveland, MA (US);
Jun Wan, Wilmington, MA (US);
Peter R. Holloway, Groveland, MA (US);
Jun Wan, Wilmington, MA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A current source for generating a PTAT current using two bipolar transistors with an 1:A emitter area ratio implements a split resistor architecture to cancel mismatch errors in the current mirror of the current source. In one embodiment, a first resistor is coupled to the unit area bipolar transistor and a second resistor is coupled to the A-ratio-area bipolar transistor. The first resistor has a resistance value indicative of the emitter resistance rof the bipolar transistors while the second resistor has a resistance value satisfying the equation r*(lnA−1). In another embodiment, an emitter area trim scheme is applied in a PTAT current source to cancel, in one trim operation, both bipolar transistor area mismatch error and sheet resistance variations. The emitter area trim scheme operates to modify the emitter area of the A-ratio-area bipolar transistor to select the best effective emitter area that provides the most accurate PTAT current.