The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2007

Filed:

Oct. 13, 2004
Applicants:

Niranjan Talwalkar, San Jose, CA (US);

Chik P. Yue, Pittsburgh, PA (US);

S. Simon Wong, Palo Alto, CA (US);

Inventors:

Niranjan Talwalkar, San Jose, CA (US);

Chik P. Yue, Pittsburgh, PA (US);

S. Simon Wong, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/01 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for adjusting an impedance of a substrate of a Metal-Oxide-Semiconductor (MOS) transistor by providing a bias voltage and connecting a frequency-selective circuit between the substrate and the bias voltage. The frequency-selective circuit is also provided with at least one reactive element, such as an inductive element or a capacitive element, to obtain a certain frequency-response of the frequency-selective circuit and thus adjusts the substrate impedance of the MOS transistor. The method and apparatus are compatible with standard CMOS technology and applicable to RF switches, including T/R switches for processing high-frequency analog signals.


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