The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2007

Filed:

Dec. 02, 2004
Applicants:

David Howard, Irvine, CA (US);

Marco Racanelli, Santa Ana, CA (US);

Greg D. U'ren, Corona del Mar, CA (US);

Inventors:

David Howard, Irvine, CA (US);

Marco Racanelli, Santa Ana, CA (US);

Greg D. U'Ren, Corona del Mar, CA (US);

Assignee:

Newport Fab, LLC, Newport Beach, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/73 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating an NPN bipolar transistor comprises forming a base layer on a top surface of a substrate. The NPN bipolar transistor may be an NPN silicon-germanium heterojunction bipolar transistor. The method for fabricating the NPN bipolar transistor may further comprise a cap layer situated over the base layer. According to this embodiment, the method for fabricating the NPN bipolar transistor further comprises fabricating an emitter over the base layer, where the emitter defines an intrinsic and an extrinsic base region of the base layer. The emitter may comprise, for example, polycrystalline silicon. The method for fabricating the NPN bipolar transistor further comprises implanting germanium in the extrinsic base region of the base layer so as to make the extrinsic base region substantially amorphous. The method for fabricating the NPN bipolar transistor further comprises implanting boron in the extrinsic base region of the base layer.


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