Wireless communication deinterleaver using multi-phase logic and cascaded deinterleaving

Abstract

A deinterleaver module in an OFDM wireless transceiver includes partitioned memory banks for storage of code word fragments from an interleaved data stream, each code word fragment associated with a prescribed subcarrier frequency. Each code word fragment includes a prescribed number of code word bits based on a prescribed modulation of the interleaved data stream, and the code word bits for each code word fragment are written into respective selected locations of the corresponding memory bank based on the prescribed modulation and the corresponding prescribed subcarrier frequency. Write enable signals, bit selection signals, and address signals for each of the code word bits are generated based on applying logical operands to a cascaded sequence of successively delayed signals synchronous with a local clock signal. The deinterleaver module outputs deinterleaved data from the memory banks based on parallel output of the respective stored code word bits from a selected address of the memory banks.