The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2007
Filed:
Dec. 22, 2005
Chiaki Takano, Austin, TX (US);
Daniel Lawrence Stasiak, Austin, TX (US);
Nathan Paul Chelstrom, Cedar Park, TX (US);
Steven Ross Ferguson, Granite Shoals, TX (US);
Chiaki Takano, Austin, TX (US);
Daniel Lawrence Stasiak, Austin, TX (US);
Nathan Paul Chelstrom, Cedar Park, TX (US);
Steven Ross Ferguson, Granite Shoals, TX (US);
Sony Computer Entertainment Inc., Tokyo, JP;
Abstract
Methods and apparatus provide for: producing a control signal at a first substantially steady state logic level indicative of a sleep mode, and at a second substantially steady state logic level indicative of a normal mode; producing a gate signal that is at a substantially steady state null level when the control signal is at the first logic level, and that oscillates at a local clock frequency when the control signal is at the second logic level; producing a local clock signal from a system clock signal as a function of the gate signal; and interposing at least one signal propagation latch circuit between an origin of the control signal and the location at which the gate signal is produced.