The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Dec. 17, 2004
Jason K. Hoff, Houston, TX (US);
Viswanathan Lakshmanan, Thornton, CO (US);
Michael Josephides, Broomfield, CO (US);
Daniel W. Prevedel, Fort Collins, CO (US);
Richard D. Blinne, Ft. Collins, CO (US);
Johathan P. Kuppinger, Windsor, CO (US);
Jason K. Hoff, Houston, TX (US);
Viswanathan Lakshmanan, Thornton, CO (US);
Michael Josephides, Broomfield, CO (US);
Daniel W. Prevedel, Fort Collins, CO (US);
Richard D. Blinne, Ft. Collins, CO (US);
Johathan P. Kuppinger, Windsor, CO (US);
LSI Corporation, Milpitas, CA (US);
Abstract
A method of implementing an engineering change order includes steps of: (a) receiving as input an integrated circuit design; (b) receiving as input an engineering change order to the integrated circuit design; (c) creating at least one window in the integrated circuit design that encloses a change to the integrated circuit design introduced by the engineering change order wherein the window is bounded by coordinates that define an area that is less than an entire area of the integrated circuit design; (d) performing a routing of the integrated circuit design that excludes routing of any net that is not enclosed by the window; (e) replacing an area in a copy of the integrated circuit design that is bounded by the coordinates of the window with results of the incremental routing to generate a revised integrated circuit design; and (f) generating as output the revised integrated circuit design.