The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Apr. 24, 2003
Paul Gentieu, Sunnyvale, CA (US);
Chris Cicchetti, Menlo Park, CA (US);
Arthur M. Lawson, Morgan Hill, CA (US);
An Huynh, Alameda, CA (US);
Harold Yang, Milpitas, CA (US);
Paul Gentieu, Sunnyvale, CA (US);
Chris Cicchetti, Menlo Park, CA (US);
Arthur M. Lawson, Morgan Hill, CA (US);
An Huynh, Alameda, CA (US);
Harold Yang, Milpitas, CA (US);
Finisar Corporation, Sunnyvale, CA (US);
Abstract
An bit error rate tester for use in connection with a high speed networks. The bit error rate tester includes transmit and receive ports, as well as a sequence generator, memory, synchronizer, sequence start detect module, and comparator. The sequence generator generates a bit sequence for transmission through a network path. The bit sequence returns to the bit error rate tester by way of the receive port. The synchronizer then bit-aligns the received bit sequence to compensate for idles/fill words added/dropped as the bit sequence transited the network. The synchronized bit sequence is passed to the start word detector which detects start and end words in the bit sequence and instructs the comparator to compare only data between the start and end words. The comparator compares the received bit sequence with a copy of the transmitted bit sequence regenerated from the memory, and calculates a bit error rate.