The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Oct. 10, 2000
Andreas Rusch, Dresden, DE;
Steffen Rothenhäusser, Dresden, DE;
Alexander Truby, Dresden, DE;
Yoichi Otani, Weixdorf, DE;
Ulrich Zimmermann, Mechanicsville, VA (US);
Andreas Rusch, Dresden, DE;
Steffen Rothenhäusser, Dresden, DE;
Alexander Truby, Dresden, DE;
Yoichi Otani, Weixdorf, DE;
Ulrich Zimmermann, Mechanicsville, VA (US);
Infineon Technologies AG, Munich, DE;
Abstract
A method for fabricating a semiconductor memory device is described. An insulating layer is disposed on a semiconductor substrate. A matrix of semiconductor memory elements is disposed in the substrate. The semiconductor memory elements include a plurality of contact holes formed in the insulating layer. One contact hole is formed in the insulating layer for each of the semiconductor memory elements. A bit definition region is disposed in the semiconductor substrate underneath each of the contact holes. A contact plug is disposed in each of the contact holes and is in electrical contact with the bit definition region. The bit definition region is configured such that a contact resistance between the semiconductor substrate and the contact plug defines a bit to be stored in the semiconductor memory elements, An evaluation circuit is connected to and evaluates the contact resistance of the semiconductor memory elements.