The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2007
Filed:
Oct. 09, 2003
Joseph A. Yedinak, Mountaintop, PA (US);
Dwayne S. Reichl, Pocono Lake, PA (US);
Bernard J. Czeck, Mocanaqua, PA (US);
Douglas J. Lange, Mountaintop, PA (US);
Joseph A. Yedinak, Mountaintop, PA (US);
Dwayne S. Reichl, Pocono Lake, PA (US);
Bernard J. Czeck, Mocanaqua, PA (US);
Douglas J. Lange, Mountaintop, PA (US);
Fairchild Semiconductor Corporation, South Portland, ME (US);
Abstract
An integrated circuit includes a die having a device layer. An insulating layer is disposed over the device layer. A die street defines the outermost bounds of the die. A voltage divider network including a plurality of resistive elements derives a plurality of predetermined bias voltages. A field plate termination includes a plurality of field plates disposed on the oxide layer and are laterally spaced apart relative to each other and relative to the die street. Each of the plurality of field plates is electrically connected to a corresponding bias voltage. The bias voltage applied to a given field plate is determined by and increases with the proximity of that field plate relative to the die street.