Semiconductor memory device including a flash memory cell array and a mask read-only memory cell array

Abstract

A semiconductor memory device included in a system-on-chip (SOC) or a microcomputer chip. The semiconductor memory device may include a flash memory cell array unit and a mask read-only memory (ROM) cell array unit which are formed in a single memory block without an isolation layer for separating the two units. Transistors included in the flash memory unit and the mask ROM unit are the same type and may have two threshold voltages. The transistor in each memory cell unit may be a split gate transistor, a metal-oxide-nitride-oxide-silicon, or silicon-oxide-nitride-oxide-silicon transistor. Further, the transistor included in the mask ROM unit in the semiconductor memory device may include enhancement transistors or depletion transistors in which a dopant ion-implanted region is formed at channel portions.