The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 12, 2007

Filed:

Oct. 25, 2005
Applicants:

Chuan-yi Wu, Taipei, TW;

Yung-chia Kuan, Taipei, TW;

Chia-chien LU, Taipei, TW;

Chin-chuan Lai, Taoyuan County, TW;

Inventors:

Chuan-Yi Wu, Taipei, TW;

Yung-Chia Kuan, Taipei, TW;

Chia-Chien Lu, Taipei, TW;

Chin-Chuan Lai, Taoyuan County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a thin film transistor is provided. First, a gate is formed on a substrate. A gate-insulating layer is formed to cover the gate. A patterned semiconductor layer is formed on the gate-insulating layer. A first and a second conductive layer are formed on the patterned semiconductor layer in sequence. The second conductive layer is patterned such that each side of thereof above the gate has a taper profile and the first conductive layer is exposed. A first plasma process is performed to transform the surface and the taper profile of the second conductive layer into a first protection layer. The first conductive layer not covered by the first protection layer and the second conductive layer is removed to form a source/drain. The source/drain is with fine dimensions and the diffusion of metallic ions from the second conductive layer to the patterned semiconductor layer can be avoided.


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