The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Feb. 12, 2002
Tod Paulus, Austin, TX (US);
Donald A. Kerth, Austin, TX (US);
Richard T. Behrens, Lafayette, CO (US);
Jeffrey W. Scott, Austin, TX (US);
G. Diwakar Vishakhadatta, Austin, TX (US);
G. Tyson Tuttle, Austin, TX (US);
Vishnu S. Srinivasan, Austin, TX (US);
Tod Paulus, Austin, TX (US);
Donald A. Kerth, Austin, TX (US);
Richard T. Behrens, Lafayette, CO (US);
Jeffrey W. Scott, Austin, TX (US);
G. Diwakar Vishakhadatta, Austin, TX (US);
G. Tyson Tuttle, Austin, TX (US);
Vishnu S. Srinivasan, Austin, TX (US);
Silicon Laboratories Inc., Austin, TX (US);
Abstract
A radio-frequency receiver circuitry includes a down-converter circuitry, an analog-to-digital converter circuitry, and a DC offset reduction circuitry. The down-converter circuitry accepts a received radio-frequency signal and processes the radio-frequency signal to provide an in-phase down-converted signal and a quadrature down-converted signal to the analog-to-digital converter circuitry. The analog-to-digital converter circuitry converts the in-phase and quadrature down-converted signals to an in-phase digital output signal and a quadrature digital output signal, respectively. The DC offset reduction circuitry couples to the analog-to-digital converter circuitry, and tends to reduce a DC offset transmitted to the in-phase and quadrature digital output signals.