The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Mar. 13, 2001
Edward Aung, San Leandro, CA (US);
Henry Lui, San Jose, CA (US);
Paul Butler, Mesa, AZ (US);
John Turner, Santa Cruz, CA (US);
Rakesh Patel, Cupertino, CA (US);
Chong Lee, San Ramon, CA (US);
Edward Aung, San Leandro, CA (US);
Henry Lui, San Jose, CA (US);
Paul Butler, Mesa, AZ (US);
John Turner, Santa Cruz, CA (US);
Rakesh Patel, Cupertino, CA (US);
Chong Lee, San Ramon, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable logic device ('PLD') is augmented with programmable clock data recover ('CDR') circuitry to allow the PLD to communicate via any of a large number of CDR signaling protocols. The CDR circuitry may be integrated with the PLD, or it may be wholly or partly on a separate integrated circuit. The circuitry may be capable of CDR input, CDR output, or both. The CDR capability may be provided in combination with other non-CDR signaling capability such as non-CDR low voltage differential signaling (“LVDS”). The circuitry may be part of a larger system.