Receiver with mirror frequency suppression

Abstract

Receiver comprising an RF front end circuit for a selection and conversion of an RF input signal into a pair of quadrature IF (intermediate frequency) signals being supplied through in-phase and phase quadrature signal paths to signal inputs of quadrature phase detection elements, such as in-phase and phase quadrature phase detectors included in a (PLL) phase locked loop, an output of the quadrature phase detection elements being coupled through a loop filter to a control input of a quadrature IF oscillator supplying a pair of quadrature IF oscillator signals to carrier inputs of the quadrature phase detection elements. To suppress amplitude and phase mismatch deteriorating proper mirror cancellation the quadrature phase detection elements is coupled to amplitude and phase error signal for a detection of amplitude and phase errors in the output signal of the quadrature phase detection elements and a quadrature frequency doubler is coupled between the quadrature local oscillator and carrier inputs of the amplitude and phase error detection means to supply respectively thereto in-phase and phase quadrature error detection carrier signals at twice the IF carrier frequency of the pair of quadrature IF signals, the amplitude and phase error detection means respectively providing amplitude and phase error signals through first and second low-pass filters to an amplitude correction circuit and a phase correction circuit preceding at least one of the inputs of the quadrature phase detection elements for a negative feedback of the amplitude and phase errors.