The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2007

Filed:

Apr. 19, 2004
Applicants:

Badrinarayanan Kothandaraman, Bangalore, IN;

Eric Mann, Sammanish, WA (US);

Thurman J. Rodgers, Woodside, CA (US);

Inventors:

Badrinarayanan Kothandaraman, Bangalore, IN;

Eric Mann, Sammanish, WA (US);

Thurman J. Rodgers, Woodside, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory device () can include a memory cell block (), a standby current source (), an active current source (), and a clamping device (). In a standby mode, a standby current source () can provide constant standby current Ito memory cell block () via block supply node (). In an active mode, active current source () can provide current to accommodate current necessary for active operations (e.g., accessing the memory cell block). A clamping circuit () can provide additional current in the event a block supply node () potential VCCX collapses due to the presence of micro-defects. In addition, compensation for process variation can be achieved by a self regulating well () to source () back bias that can modulate the threshold voltage of p-channel transistors of memory cells within the well (), reducing overall leakage.


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