The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7225417 B1

PDF
Full Text
Expired
Date of Patent:
May. 29, 2007

Filed:

Feb. 05, 2004
Applicants:

Edmund M. Clarke, Mt. Lebanaon, PA (US);

Daniel Kroening, Pittsburgh, PA (US);

Karen Yorav, Haifa, IL;

Inventors:

Edmund M. Clarke, Mt. Lebanaon, PA (US);

Daniel Kroening, Pittsburgh, PA (US);

Karen Yorav, Haifa, IL;

Assignee:

Carnegie Mellon University, Pittsburgh, PA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method to verify a circuit design may include applying a bounded model checking technique to a first computer language representation of the circuit design and to a second computer language representation of the circuit design. The method may also include determining a behavioral consistency between the first and second computer language representations.


Find Patent Forward Citations

Clarke, Edmund. (2007). Method and system to verify a circuit design by verifying consistency between two different language representations of a circuit design (U.S. Patent No. 7225417). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7225417

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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