The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7225092 B1

PDF
Full Text
Expired
Date of Patent:
May. 29, 2007

Filed:

Oct. 21, 2004
Applicants:

David W. Boerstler, Round Rock, TX (US);

Eskinder Hailu, Austin, TX (US);

Kazuhiko Miki, Round Rock, TX (US);

Inventors:

David W. Boerstler, Round Rock, TX (US);

Eskinder Hailu, Austin, TX (US);

Kazuhiko Miki, Round Rock, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus, a method, and a computer program are provided to measure the duty cycle of a clocking signal in a processor. Traditionally, variations in the duty cycles of clocks within microprocessors have been of considerable concern. By employing frequency dividers and AND gates, the duty cycles of clocks can be precisely measured and adjusted accordingly to account for variation that might occur. The measurements and adjustments, therefore, can improve the operation of a microprocessor or any other clocked semiconductor.


Find Patent Forward Citations

Boerstler, David. (2007). Method and apparatus for measuring and adjusting the duty cycle of a high speed clock (U.S. Patent No. 7225092). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7225092

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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