The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2007
Filed:
Jan. 11, 2000
Taizo Yamawaki, Tokyo, JP;
Satoshi Tanaka, Kokubunji, JP;
Masaru Kokubo, Hanno, JP;
Kazuo Watanabe, Takasaki, JP;
Masumi Kasahara, Takasaki, JP;
Kazuaki Hori, Yokohama, JP;
Julian Hildersley, Hertfordshire, GB;
Taizo Yamawaki, Tokyo, JP;
Satoshi Tanaka, Kokubunji, JP;
Masaru Kokubo, Hanno, JP;
Kazuo Watanabe, Takasaki, JP;
Masumi Kasahara, Takasaki, JP;
Kazuaki Hori, Yokohama, JP;
Julian Hildersley, Hertfordshire, GB;
Hitachi, Ltd., Tokyo, JP;
TTP Communications Limited, Hertfordshire, GB;
Abstract
There are provided a transmitter and a wireless communication terminal apparatus using the same for solving a problem of undesired spurs due to harmonics of an output signal of a frequency synthesizer, and further solving a problem of the undesired spurs occurring when the harmonics of an output signal of a crystal oscillator are mixed into a VCO to facilitate to design a circuit or a mounting substrate. The transmitter has a relationship between an output frequency of a PLL frequency conversion circuit () and output frequencies of frequency synthesizers () stored therein, and the output frequencies of the frequency synthesizers () input into the PLL frequency conversion circuit () are controlled on the basis of the relationship so that the undesired spurs are suppressed. Thereby, even when the undesired spurs occur in the output of the transmitter due to a crosstalk between circuits or through a substrate, which can be easily suppressed, it is therefore possible to reduce time and cost for redesigning the circuit or the substrate.