The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2007

Filed:

Feb. 03, 1999
Applicants:

Lordson L. Yue, Foster City, CA (US);

James T. Battle, San Jose, CA (US);

Inventors:

Lordson L. Yue, Foster City, CA (US);

James T. Battle, San Jose, CA (US);

Assignee:

ATI International SRL, Christchurch, BB;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06T 11/00 (2006.01); G06T 11/20 (2006.01);
U.S. Cl.
CPC ...
Abstract

A frame buffer is divided into tiles of, for example, 32 by 32 pixels. Triangles (and portions thereof) that are within a given tile are rasterized one triangle at a time into the tile location. This process repeats for each tile in the image frame. A sorting circuit generates control bits representing a vertical order of the vertices of a current triangle. A series of multiplexers vertically sorts the vertices bases on these control bits. A region calculation circuit generates region bits representing a location each of the vertices with respect to the current tile. A trivial discard of the triangle data occurs if the region bits indicate that the entire triangle lies outside of the tile. Subsequently, an initial rasterization starting point is estimated based on the region bits to lower the time needed for the rasterizer to find the first pixel of the current triangle to be assigned values.


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