The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2007

Filed:

Nov. 01, 2000
Applicants:

Makoto Onozawa, Kawasaki, JP;

Michitaka Ohsawa, Kawasaki, JP;

Kenji Ishiwata, Kawasaki, JP;

Takeshi Kuwahara, Kawasaki, JP;

Yoshikazu Kanazawa, Kawasaki, JP;

Kenji Kimura, Kawasaki, JP;

Hidenori Ohnuki, Kawasaki, JP;

Taizo Ohno, Higashimorokata, JP;

Inventors:

Makoto Onozawa, Kawasaki, JP;

Michitaka Ohsawa, Kawasaki, JP;

Kenji Ishiwata, Kawasaki, JP;

Takeshi Kuwahara, Kawasaki, JP;

Yoshikazu Kanazawa, Kawasaki, JP;

Kenji Kimura, Kawasaki, JP;

Hidenori Ohnuki, Kawasaki, JP;

Taizo Ohno, Higashimorokata, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A PDP apparatus of low power consumption and without erroneous malfunctions is equipped with a sustaining circuit that prevents an on/off timing shift and deterioration of a sustaining pulse produced thereby. Phase adjusting circuits, which adjust the timing of the changing edge of the sustaining pulse, are provided for the sustaining circuit; the power recovery circuit is of improved efficiency; and power consumption is reduced by optimizing the timing of a changing edge of the sustaining pulse The circuit devices used in the sustaining circuits are classified according to delay times and sets of the circuit devices are selected so that the timing of a changing edge of the sustaining pulse falls within a predetermined allowance, and the selected sets of the circuit devices are set to the PDP.


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