The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2007
Filed:
Mar. 08, 2005
William Louis Walter, Lowell, MA (US);
William Louis Walter, Lowell, MA (US);
Linear Technology Corporation, Milpitas, CA (US);
Abstract
A method and circuit for driving the gate of a MOS transistor having a negative or low threshold voltage negative, in which the driving circuit is formed on a single chip. A negative voltage is generated from a positive voltage to drive the gate of the MOS transistor negative. The MOS transistor may be a native NMOS transistor, and the negative voltage is generated for increasing source-drain impedance of the native NMOS transistor. On the other hand, the MOS transistor may be a PMOS transistor, and the negative voltage is generated for reducing source-drain impedance of the PMOS transistor. The MOS transistor can be used as an open-drain switch or a source follower.