The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2007

Filed:

May. 28, 2004
Applicants:

John W. Sherohman, Livermore, CA (US);

Arthur W. Coombs, Iii, Patterson, CA (US);

Jick Hong Yee, Livermore, CA (US);

Kuang Jen J. Wu, Cupertino, CA (US);

Inventors:

John W. Sherohman, Livermore, CA (US);

Arthur W. Coombs, III, Patterson, CA (US);

Jick Hong Yee, Livermore, CA (US);

Kuang Jen J. Wu, Cupertino, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/12 (2006.01); H01L 31/0328 (2006.01);
U.S. Cl.
CPC ...
Abstract

For the first time, an aluminum antimonide (AlSb) single crystal substrate is utilized to lattice-match to overlying semiconductor layers. The AlSb substrate establishes a new design and fabrication approach to construct high-speed, low-power electronic devices while establishing inter-device isolation. Such lattice matching between the substrate and overlying semiconductor layers minimizes the formation of defects, such as threaded dislocations, which can decrease the production yield and operational life-time of 6.1-Å family heterostructure devices.


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