The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2007

Filed:

Oct. 10, 2003
Applicants:

Jason D. Sollom, Champlin, MN (US);

James A. Williams, Mahtomedi, MN (US);

Christopher M. Cischke, Shoreview, MN (US);

Inventors:

Jason D. Sollom, Champlin, MN (US);

James A. Williams, Mahtomedi, MN (US);

Christopher M. Cischke, Shoreview, MN (US);

Assignee:

Unisys Corporation, Blue Bell, PA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Techniques are described for emulating inter-processor communications between multiple instruction processors. The techniques provide inter-processor message accounting and error detection. A system, for example, includes software executing within an emulation environment provided by a computing system. The emulation software emulates an instruction processor having an interface to receive inter-processor messages. During emulation the emulated instruction processor calculates an actual count of the inter-processor messages received during emulation. A compiler executing on the computing system compiles test software to output an instruction stream for execution by the emulated instruction processor. The compiler calculates an expected count of inter-processor messages that the emulated instruction processor is expected to receive during emulation. Emulation control software executing on the computing system generates a report that presents the expected count of the inter-processor messages and the actual count of the inter-processor messages.


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